ARM - an acronym for: Advanced RISC Machines
The processor originated in England in 1984. At its inception ARM stood for Acorn RISC Machine. The first ARM reliant systems include the Acorn: BBC Micro, Masters, and the Archimedes. During this early period they were used mostly for British educational systems, and therefore, were not widely available or known outside England. However in 1987 the ARM became the first commercial RISC processor.
In 1990, the research section of Acorn separated from the parent company and formed: ARM Ltd. (Advanced RISC Machines Limited). Other historical notables are that the Macintosh Apple ][GS was run by an ARM processor, as was the ill-fated Newton portable note-taking device. (Not ill-fated because of the processor but because of the market timing).
RISC is an acronym standing for "Reduced Instruction Set Computer", contrasted with a CISC machine (Complex Instruction Set Computer).
RISC claims of simplicity in comparison to CISC:
Fixed 32-bit instruction size instead of variable
Large register bank of GPR 32-bit registers
Easier to prototype and put together
RISC Organization:
Hard-wired instruction decode logic instead of microcoded ROMs to decode
Pipelined execution
Possible single cycle execution
RISC Advantages
Smaller die sizes
Shorter time to develop
Possible higher performance than CISC
High clock rate with single cycle
RISC Disadvantages
Generally less code density than CISC
Cannot execute x86 code, at least not without some sort of conversion and performance drawback
So, what make the ARM architecture so special?
The sales pitch goes something like this, "The ARM architecture has the best MIPS to Watts ratio as well as best MIPS to $ ratio in the industry; the smallest CPU die size; all the necessary computing capability coupled with low power consumption of which a highly flexible and customizable set of processors are available with options to choose from, all at a low cost."
ARM makers have been able to apply an instruction set called Thumb, which takes 32-bit instructions and compresses them down to 16-bits. This tactic enables programs to be coded much more densely than standard RISC instruction sets, not to mention cutting some portions of the hardware down in size.
Processors enabled to take advantage of Thumb also allow 32-bit instructions to run on the same processor. In fact, 16-bit and 32-bit instructions can be mixed together and the hardware will be able to decode and decompress at the same time without a performance hit, thus maintaining powerful computing capabilities.
FROM: https://www.cs.umd.edu/~meesh/cmsc411/website/proj01/arm/home.html
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